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Disambiguation

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RTL Level Preparation of High-Quality/Low-Energy/Low-Power BIST.

, , , , , и . ITC, стр. 814-823. IEEE Computer Society, (2002)

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Marcelino Arciniega

Marcelino Passos

Marcelino Arciniega Castro

Francisco Marcelino Mucauque

Marcelino Cisneros Garcia

 

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Modeling of Inherent Losses of Fully Integrated Switched Capacitor DC-DC Converters., , , и . J. Low Power Electron., 8 (5): 667-673 (2012)On the Analysis of Routing Cells and Adjacency Faults in CMOS Digital Circuits., , , и . DFT, стр. 263-270. IEEE Computer Society, (1994)Digital modular control of high frequency DC-DC converters., , и . Microelectron. J., 45 (10): 1254-1260 (2014)Ultra low power capless LDO with dynamic biasing of derivative feedback., , , и . Microelectron. J., 44 (2): 94-102 (2013)RTL Design Validation, DFT and Test Pattern Generation for High Defects Coverage., , , и . J. Electron. Test., 18 (2): 179-187 (2002)Low Power BIST by Filtering Non-Detecting Vectors., , , , , , , , , и . J. Electron. Test., 16 (3): 193-202 (2000)On High-Quality, Low Energy Built-In Self Test Preparation at RT-Level., , , , , и . J. Electron. Test., 20 (4): 345-355 (2004)Aging-Aware Power or Frequency Tuning With Predictive Fault Detection., , , , , , , , и . IEEE Des. Test Comput., 29 (5): 27-36 (2012)Performance Sensor for Reliable Operation., , , , и . HCI (8), том 10908 из Lecture Notes in Computer Science, стр. 347-365. Springer, (2018)Monolithic Multi-mode DC-DC Converter with Gate Voltage Optimization., , , , и . PATMOS, том 5349 из Lecture Notes in Computer Science, стр. 258-267. Springer, (2008)