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Frequency Estimation in Interpolated Discrete Fourier Transform With Generalized Maximum Sidelobe Decay Windows for the Control of Power., , , and . IEEE Trans. Ind. Informatics, 17 (3): 1614-1624 (2021)Logic synthesis based on decomposition for CPLDs., and . Microprocess. Microsystems, 34 (1): 25-38 (2010)Synthesis of finite state machines for CPLDs., and . Int. J. Appl. Math. Comput. Sci., 19 (4): 647-659 (2009)Interpolated-DFT-Based Fast and Accurate Frequency Estimation for the Control of Power., , and . IEEE Trans. Ind. Electron., 61 (12): 7026-7034 (2014)Methods of Improving Time Efficiency of Decomposition Dedicated at FPGA Structures and Using BDD in the Process of Cyber-Physical Synthesis., , and . IEEE Access, (2019)A Technology Mapping of FSMs Based on a Graph of Excitations and Outputs., , and . IEEE Access, (2019)IEEE Access Special Section: Cyber-Physical Systems., , , , , and . IEEE Access, (2019)A Novel Method of Two-Stage Decomposition Dedicated for PAL-based CPLDs., , and . DSD, page 114-121. IEEE Computer Society, (2005)A Technology Mapping Algorithm for PAL-Based Devices Using Multi-Output Function Graphs.. EUROMICRO, page 1146-. IEEE Computer Society, (2000)State assignment and logic optimization for finite state machines., and . PDeS, page 39-44. International Federation of Automatic Control, (2009)