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Disambiguation of "Notomi, Masaya"

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An integrated optical parallel adder as a first step towards light speed data processing.

, , , , and . ISOCC, page 123-124. IEEE, (2016)

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Other publications of authors with the same name

High-Temperature Operation of Photonic-Crystal Lasers for On-Chip Optical Interconnection., , , , , , , , and . IEICE Trans. Electron., 95-C (7): 1244-1251 (2012)Low-power nanophotonic devices based on photonic crystals towards dense photonic network on chip., , , , , , , , and . IET Circuits Devices Syst., 5 (2): 84-93 (2011)Ultrahigh-Q one-dimensional photonic crystal nanocavities with modulated mode-gap barriers on SiO\_2 claddings and on air claddings, , , , , and . Optics Express, 18 (15): 15859 (July 2010)Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics., , , , , and . DAC, page 139-144. IEEE, (2021)Integrated on-chip optical links using photonic-crystal lasers and photodetectors with current blocking trenches., , , , , , , , and . OFC/NFOEC, page 1-3. IEEE, (2013)An integrated optical parallel adder as a first step towards light speed data processing., , , , and . ISOCC, page 123-124. IEEE, (2016)Femto-Farad Nanophotonic Devices for fJ/Bit Signal Conversion., , , , , , and . OFC, page 1-3. IEEE, (2020)Self-collimating phenomena in photonic crystals, , , , , , and . Applied Physics Letters, 74 (9): 1212 (1999)Methods for Reducing Power and Area of BDD-Based Optical Logic Circuits., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 102-A (12): 1751-1759 (2019)A Synthesis Method Based on Multi-Stage Optimization for Power-Efficient Integrated Optical Logic Circuits., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 104-A (11): 1546-1554 (2021)