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Energy consumption in reconfigurable mpsoc architecture: Two-level caches optimization oriented approach., , , and . IDT, page 1-6. IEEE, (2013)A new memory reliability technique for multiple bit upsets mitigation., , , and . CF, page 145-152. ACM, (2019)Efficient FPGA implementation of H.264 CAVLC entropy decoder., , , , and . IDT, page 1-3. IEEE, (2013)Keynote 2: "Embedded systems design for critical applications".. IDT, page xii. IEEE, (2016)A GPU enhanced LIDAR Perception System for Autonomous Vehicles., , , and . PDP, page 232-236. IEEE, (2020)Optimal sample length for efficient cache simulation., , and . J. Syst. Archit., 51 (9): 513-525 (2005)Design of Multiple-Target Tracking System on Heterogeneous System-on-Chip Devices., , , and . IEEE Trans. Vehicular Technology, 65 (6): 4802-4812 (2016)Scalable row-based parallel H.264 decoder on embedded multicore processors., , , and . Signal Image Video Process., 9 (Supplement-1): 57-71 (2015)Performance Prediction for Convolutional Neural Networks in Edge Devices., , , and . CoRR, (2020)A WCET-aware cache coloring technique for reducing interference in real-time systems., , , and . CoRR, (2019)