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Disambiguation of "Matsuura, Munehiro"

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BDD representation for incompletely specifiedvmultiple-output logic functions and its applications to functional decomposition.

, and . DAC, page 373-378. ACM, (2005)

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Takeshi Matsuura

 

Other publications of authors with the same name

A Memory-Based IPv6 Lookup Architecture Using Parallel Index Generation Units., , , , and . IEICE Trans. Inf. Syst., 98-D (2): 262-271 (2015)A Heterogeneous Multi-valued Decision Diagram Machine for Encoded Characteristic Function for Non-zero Outputs., , and . J. Multiple Valued Log. Soft Comput., 23 (3-4): 365-377 (2014)Design Methods for Binary to Decimal Converters Using Arithmetic Decompositions., , and . J. Multiple Valued Log. Soft Comput., 13 (4-6): 503-520 (2007)BDD Representation for Incompletely Specified Multiple-Output Logic Functions and Its Applications to the Design of LUT Cascades., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 90-A (12): 2762-2769 (2007)A method to decompose multiple-output logic functions., and . DAC, page 428-433. ACM, (2004)Realization of Multiple-Output Functions by Reconfigurable Cascades., , and . ICCD, page 388-393. IEEE Computer Society, (2001)A Packet Classifier Using a Parallel Branching Program Machine., , and . DSD, page 745-752. IEEE Computer Society, (2010)Representation of Incompletely Specified Index Generation Functions Using Minimal Number of Compound Variables., , and . DSD, page 765-772. IEEE Computer Society, (2009)Realization of Regular Ternary Logic Functions., , , and . ASP-DAC, page 331-. IEEE Computer Society, (1999)Representations of Logic Functions Using QRMDDs., , , and . ISMVL, page 261-269. IEEE Computer Society, (2002)