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Disambiguation of "Pell, Oliver"

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An FPGA-Based Data Flow Engine for Gaussian Copula Model.

, , , , , , , and . FCCM, page 218-225. IEEE Computer Society, (2013)

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Barney Pell

Stefanie Pell

Dietrich Pellnitz

Kazimierz Pellech

Peter Peller

 

Other publications of authors with the same name

Beyond Traditional Microprocessors for Geoscience High-Performance Computing Applications., , , , , and . IEEE Micro, 31 (2): 41-49 (2011)Maximum Performance Computing with Dataflow Engines., and . Comput. Sci. Eng., 14 (4): 98-103 (2012)On the Impact of Replacing Low-Speed Configuration Buses on FPGAs with the Chip's Internal Configuration Infrastructure., , , , , and . ACM Trans. Reconfigurable Technol. Syst., 9 (1): 6:1-6:18 (2015)Quartz: a framework for correct and efficient reconfigurable design., and . ReConFig, IEEE Computer Society, (2005)Surviving the end of frequency scaling with reconfigurable dataflow computing., and . SIGARCH Comput. Archit. News, 39 (4): 60-65 (2011)On the Impact of Replacing a Low-Speed Memory Bus on the Maxeler Platform, Using the FPGA's Configuration Infrastructure., , , and . ARC, volume 8405 of Lecture Notes in Computer Science, page 85-96. Springer, (2014)Accelerating Large-Scale HPC Applications Using FPGAs., , and . IEEE Symposium on Computer Arithmetic, page 191-192. IEEE Computer Society, (2011)FPGA-Based Design Using the FASTER Toolchain: The Case of STM Spear Development Board., , , , , , , , , and 3 other author(s). ISPA, page 134-141. IEEE Computer Society, (2014)Generating Parametrised Hardware Libraries from Higher-Order Descriptions., and . FCCM, page 297-298. IEEE Computer Society, (2006)Compiling Higher-Order Polymorphic Hardware Descriptions Into Parametrised VHDL Libraries with Flexible Placement Information., and . FPL, page 1-6. IEEE, (2006)