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Cache Design with Domain Wall Memory., , , , , , и . IEEE Trans. Computers, 65 (4): 1010-1024 (2016)A 65nm 376nA 0.4V linear classifier using time-based matrix-multiplying ADC with non-linearity aware training., и . A-SSCC, стр. 309-312. IEEE, (2017)Computing with Dynamical Systems Based on Insulator-Metal-Transition Oscillators., , , , и . CoRR, (2016)Practical Approaches Toward Deep-Learning-Based Cross-Device Power Side-Channel Attack., , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 27 (12): 2720-2733 (2019)Learning to Walk: Spike Based Reinforcement Learning for Hexapod Robot Central Pattern Generation., , , и . AICAS, стр. 208-212. IEEE, (2020)XBAROPT - Enabling Ultra-Pipelined, Novel STT MRAM Based Processing-in-Memory DNN Accelerator., , , и . AICAS, стр. 36-40. IEEE, (2020)OPTIMO: A 65-nm 279-GOPS/W 16-b Programmable Spatial-Array Processor with On-Chip Network for Solving Distributed Optimizations via the Alternating Direction Method of Multipliers., , , и . IEEE J. Solid State Circuits, 55 (3): 629-638 (2020)NeuroSLAM: A 65-nm 7.25-to-8.79-TOPS/W Mixed-Signal Oscillator-Based SLAM Accelerator for Edge Robotics., и . IEEE J. Solid State Circuits, 56 (1): 66-78 (2021)Smart Sensing for HVAC Control: Collaborative Intelligence in Optical and IR Cameras., , , и . IEEE Trans. Ind. Electron., 65 (12): 9785-9794 (2018)Energy-Recovery Techniques to Reduce On-Chip Power Density in Molecular Nanotechnologies., , и . IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (8): 1580-1589 (2005)