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Circuit Structure Relations to Redundancy and Delay: The KMS Algorithm Revisited.

, , и . DAC, стр. 245-248. IEEE Computer Society Press, (1992)

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Michael Saldanha

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Performance Optimization Using Exact Sensitization., , , , и . DAC, стр. 425-429. ACM Press, (1994)Multi-level Logic Simplification Using Don't Cares and Filters., , , и . DAC, стр. 277-282. ACM Press, (1989)Delay fault coverage, test set size, and performance trade-offs., , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (1): 32-44 (1995)Is Redundancy Necessary to Reduce Delay., , и . DAC, стр. 228-234. IEEE Computer Society Press, (1990)Verification of Electronic Systems., , и . DAC, стр. 106-111. ACM Press, (1996)Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool., , , и . DAC, стр. 254-260. ACM Press, (1995)Equivalence of Robust Delay-Fault and Single Stuck-Fault Test Generation., , и . DAC, стр. 173-176. IEEE Computer Society Press, (1992)Trace driven logic synthesis - application to power minimization., , , и . ICCAD, стр. 581-588. IEEE Computer Society / ACM, (1997)Compact and complete test set generation for multiple stuck-faults., , , и . ICCAD, стр. 212-219. IEEE Computer Society / ACM, (1996)Supervisory Control of Finite State Machines., , , , и . CAV, том 939 из Lecture Notes in Computer Science, стр. 279-292. Springer, (1995)