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On Error Injection for NoC Platforms: A UVM-Based Generic Verification Environment.

, , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (5): 1137-1150 (2020)

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Hardware Security Analysis of Arbiters: Trojan Modeling and Formal Verification., , , and . VLSI-SoC, page 1-6. IEEE, (2023)Implementation and Functional Verification of RISC-V Core for Secure IoT Applications., , , , , , and . ICM, page 254-257. IEEE, (2021)A narrative of UVM testbench environment for interconnection routers: A practical approach., , , , , , , and . IDT, page 98-103. IEEE, (2016)Performance evaluation of virtual channel flow control in centralized and distributed networks for system on chip., , , , , , and . ICM, page 1-4. IEEE, (2017)Noise Reduction in Reset Domain Crossings Verification Using Formal Verification., , and . EWDTS, page 1-5. IEEE, (2020)On Error Injection for NoC Platforms: A UVM-based Practical Case Study., , , , , , and . NoCArc@MICRO, page 2:1-2:6. ACM, (2017)On Error Injection for NoC Platforms: A UVM-Based Generic Verification Environment., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (5): 1137-1150 (2020)Non-Invasive Hardware Trojans Modeling and Insertion: A Formal Verification Approach., , , and . J. Electron. Test., 40 (1): 117-135 (February 2024)