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Fast Predictive Handshaking in Synchronous FPGAs for Fully Asynchronous Multisymbol Chip Links: Application to SpiNNaker 2-of-7 Links.

, , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (8): 763-767 (2016)

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An admission control system for QoS provision on a best-effort GALS interconnect., , , and . ACSD, page 200-207. IEEE, (2008)Architectural optimization for low-power nonpipelined asynchronous systems., and . IEEE Trans. Very Large Scale Integr. Syst., 6 (1): 56-65 (1998)A Token-Managed Admission Control System for QoS Provision on a Best-Effort GALS Interconnect., , , and . Fundam. Informaticae, 95 (1): 53-72 (2009)Adaptive admission control on the SpiNNaker MPSoC., , and . SoCC, page 243-246. IEEE, (2009)Performance-driven syntax-directed synthesis of asynchronous processors., , , , and . CASES, page 43-47. ACM, (2007)Fast Predictive Handshaking in Synchronous FPGAs for Fully Asynchronous Multisymbol Chip Links: Application to SpiNNaker 2-of-7 Links., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (8): 763-767 (2016)Event-driven configuration of a neural network CMP system over an homogeneous interconnect fabric., , , , , , , , , and 2 other author(s). Parallel Comput., 37 (8): 392-409 (2011)Analytical Assessment of the Suitability of Multicast Communications for the SpiNNaker Neuromimetic System., , , , and . HPCC-ICESS, page 1-8. IEEE Computer Society, (2012)Dynamic Power Management for Neuromorphic Many-Core Systems., , , , , , , , , and 5 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (8): 2973-2986 (2019)Optimizations for Very Long and Sparse Vector Operations on a RISC-V VPU: A Work-in-Progress., , , , , , , , and . ISC Workshops, volume 13999 of Lecture Notes in Computer Science, page 472-485. Springer, (2023)