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Intel® Core™ i5/i7 QuickPath Interconnect receiver clocking circuits and training algorithm., , , и . VLSI-DAT, стр. 1-4. IEEE, (2012)Modeling the response of Bang-Bang digital PLLs to phase error perturbations., , , , , , и . CICC, стр. 1-4. IEEE, (2012)A Family of 32 nm IA Processors., , , , , , , , , и 2 other автор(ы). IEEE J. Solid State Circuits, 46 (1): 119-130 (2011)Westmere: A family of 32nm IA processors., , , , , , и . ISSCC, стр. 96-97. IEEE, (2010)A Compact First-Order ΣΔ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process., , , , , , и . IEEE J. Solid State Circuits, 51 (2): 378-390 (2016)5.9 Haswell: A family of IA 22nm processors., , , , , , , , , и 6 other автор(ы). ISSCC, стр. 112-113. IEEE, (2014)Skewed Repeater Bus: A Low-Power Scheme for On-Chip Buses., , , , , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (7): 1904-1910 (2008)A 12MHz/38.4MHz Fast Start-Up Crystal Oscillator using Impedance Guided Chirp Injection in 22nm FinFET CMOS., , , , , , , , , и 1 other автор(ы). CICC, стр. 1-2. IEEE, (2021)29.3 80ns Fast-Lock 0.4-to-6.5GHz Clock Generator with Self- Referenced Asynchronous Adaptive Droop Mitigation., , , , , , и . ISSCC, стр. 408-410. IEEE, (2021)Low power analog circuit techniques in the 5th generation intel coreTM microprocessor (broadwell)., , , и . CICC, стр. 1-4. IEEE, (2015)