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DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET.

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Wafer-Scale Fast Fourier Transforms., , , , , and . ICS, page 180-191. ACM, (2023)Wafer-Scale Fast Fourier Transforms., , , , , and . CoRR, (2022)Tascade: Hardware Support for Atomic-free, Asynchronous and Efficient Reduction Trees., , , and . CoRR, (2023)A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration., , , , , and . ICCAD, page 97:1-97:9. IEEE, (2020)CIFER: A 12nm, 16mm2, 22-Core SoC with a 1541 LUT6/mm2 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA., , , , , , , , , and 9 other author(s). CICC, page 1-2. IEEE, (2023)Muchisim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems., , , and . CoRR, (2023)AutoSVA: Democratizing Formal Verification of RTL Module Interactions., , , and . DAC, page 535-540. IEEE, (2021)The MosaicSim Simulator (Full Technical Report)., , , , , , , , , and . CoRR, (2020)Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications., , , and . CoRR, (2022)Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications., , , and . HPCA, page 718-730. IEEE, (2023)