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Disambiguation of "Brisk, Philip"

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Instruction generation and regularity extraction for reconfigurable processors.

, , , and . CASES, page 262-269. ACM, (2002)

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Rudolf Briske

Paul Brisken

Magnus Briskorn

Kathrin Brisken

Robert Briske

 

Other publications of authors with the same name

Path scheduling on digital microfluidic biochips., and . DAC, page 26-35. ACM, (2012)A Low-Cost Field-Programmable Pin-Constrained Digital Microfluidic Biochip., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (11): 1657-1670 (2014)Reducing Microfluidic Very Large Scale Integration (mVLSI) Chip Area by Seam Carving., , and . ACM Great Lakes Symposium on VLSI, page 459-462. ACM, (2017)Reducing the pressure on routing resources of FPGAs with generic logic chains., , , and . FPGA, page 237-246. ACM, (2011)Reducing the cost of floating-point mantissa alignment and normalization in FPGAs., , , , , and . FPGA, page 255-264. ACM, (2012)Exploiting fast carry-chains of FPGAs for designing compressor trees., , and . FPL, page 242-249. IEEE, (2009)MPSoC Design Using Application-Specific Architecturally Visible Communication., , , and . HiPEAC, volume 5409 of Lecture Notes in Computer Science, page 183-197. Springer, (2009)Automatic Application of Power Analysis Countermeasures., , , , , and . IEEE Trans. Computers, 64 (2): 329-341 (2015)Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage., , , , and . ACM Trans. Archit. Code Optim., 11 (2): 15:1-15:26 (2014)Dynamic Radial Placement and Routing in Paper Microfluidics., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (10): 1971-1984 (2021)