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Full Error Detection and Correction Method Applied on Pipelined Structure Using Two Approaches.

, , , , and . J. Circuits Syst. Comput., 29 (13): 2050218:1-2050218:15 (2020)

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A new method for correcting time and soft errors in combinational circuits., , and . DDECS, page 283-286. IEEE Computer Society, (2013)Full Error Detection and Correction Method Applied on Pipelined Structure Using Two Approaches., , , , and . J. Circuits Syst. Comput., 29 (13): 2050218:1-2050218:15 (2020)The Impact of Diverse Execution Strategies on Incremental Code Updates for Wireless Sensor Networks., and . SENSORNETS, page 30-39. SciTePress, (2019)Neue Ansätze zur Verbesserung der Fehlertoleranz gegenüber transienten Fehlern in sequentiellen Schaltungen. University of Potsdam, Germany, (2016)base-search.net (ftubpotsdam:oai:kobv.de-opus4-uni-potsdam:10140).Fault tolerant linear state machines., and . LATW, page 1-6. IEEE, (2014)Enhanced architectures for soft error detection and correction in combinational and sequential circuits., , , and . Microelectron. Reliab., (2016)Improved circuitry for soft error correction in combinational logic in pipelined designs., , , and . IOLTS, page 93-98. IEEE, (2014)Selective Fault Tolerance by Counting Gates with Controlling Value., , , , , and . IOLTS, page 15-20. IEEE, (2019)Error Correction of Transient Errors in a Sum-Bit Duplicated Adder by Error Detection., , and . DSD, page 855-862. IEEE Computer Society, (2013)