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Silicon Proven 1.8 µm × 9.2 µm 65-nm Digital Bit Generator for Hardware Security Applications.

, , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (10): 1713-1717 (2019)

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A New Approach to UEP-HARQ via Convolutional Codes., , , and . CoRR, (2015)A new efficiency criterion for security oriented error correcting codes., and . ETS, page 1-6. IEEE, (2014)Zero-latency zero-error codes for parallel asynchronous channels with arbitrary skews., and . ITW, page 1-4. IEEE, (2015)On the Efficiency of Berger Codes Against Error Injection Attacks on Parallel Asynchronous Communication Channels., and . Inf. Secur. J. A Glob. Perspect., 22 (5-6): 208-215 (2013)A new class of security oriented error correcting robust codes., and . Cryptogr. Commun., 11 (5): 965-978 (2019)An SRAM-Based PUF With a Capacitive Digital Preselection for a 1E-9 Key Error Probability., , , , and . IEEE Trans. Circuits Syst., 67-I (12): 4855-4868 (2020)Hardware Security (Dagstuhl Seminar 16202)., , and . Dagstuhl Reports, 6 (5): 72-93 (2016)Randomized Multitopology Logic Against Differential Power Analysis., , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (4): 702-711 (2015)Security-oriented Code-based Architectures for Mitigating Fault Attacks., , , and . DCIS, page 1-6. IEEE, (2018)A New Construction of Minimum Distance Robust Codes., and . ICMCTA, volume 10495 of Lecture Notes in Computer Science, page 272-282. Springer, (2017)