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Disambiguation of "Sakiyama, Kazuo"

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Hardware/Software Cooperative Design Against Power Side-Channel Attacks on IoT Devices.

, , , , , and . IEEE Internet Things J., 11 (9): 16758-16768 (May 2024)

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Kazuo Inoue

Kazuo Okohira

Kazuo Yajima

Kazuo Araki

Kazuo OÌ no

 

Other publications of authors with the same name

Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage., , , , , , , , , and 4 other author(s). IEICE Trans. Electron., 97-C (4): 272-279 (2014)Mixture-Based 5-Round Physical Attack against AES: Attack Proposal and Noise Evaluation., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 105-A (3): 289-299 (2022)Robust RFID Authentication Protocol with Formal Proof and Its Feasibility., , , , and . IACR Cryptology ePrint Archive, (2010)Polynomial-Advantage Cryptanalysis of 3D Cipher and 3D-Based Hash Function., , , and . IWSEC, volume 7631 of Lecture Notes in Computer Science, page 170-181. Springer, (2012)Exploring the Relations between Fault Sensitivity and Power Consumption., , , , , , , , and . COSADE, volume 7864 of Lecture Notes in Computer Science, page 137-153. Springer, (2013)Arithmetic for Public-Key Cryptography., and . Secure Integrated Circuits and Systems, Springer, (2010)Abstraction Model of Probing and DFA Attacks on Block Ciphers., , , , and . IACR Cryptol. ePrint Arch., (2023)All You Need Is Fault: Zero-Value Attacks on AES and a New λ-Detection M&M., , , , , , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024 (1): 133-156 (2024)A fast dual-field modular arithmetic logic unit and its hardware implementation., , and . ISCAS, IEEE, (2006)A Deep Learning Attack Countermeasure with Intentional Noise for a PUF-Based Authentication Scheme., , , and . SECITC, volume 12001 of Lecture Notes in Computer Science, page 78-94. Springer, (2019)