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Estimation of circuit component values in buck converter using efficiency curve., , , and . ISPACS, page 895-900. IEEE, (2017)Flat passband gain design algorithm for 2nd-order RC polyphase filter., , , , , and . ASICON, page 1-4. IEEE, (2015)Single inductor DC-DC converter with bipolar outputs using charge pump., , , , , , , , , and 2 other author(s). APCCAS, page 460-463. IEEE, (2010)High-Efficiency Charge-Pump Circuits which Use a 0.5Vdd-Step Pumping Method., , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 86-A (2): 371-380 (2003)IEEE754 Binary32 Floating-Point Logarithmic Algorithms Based on Taylor-Series Expansion with Mantissa Region Conversion and Division., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 105-A (7): 1020-1027 (2022)CMOS Circuits to Measure Timing Jitter Using a Self-Referenced Clock and a Cascaded Time Difference Amplifier With Duty-Cycle Compensation., , , , and . IEEE J. Solid State Circuits, 47 (11): 2701-2710 (2012)Image processing regularization filters on layered architecture., , , and . Neural Networks, 6 (3): 327-350 (1993)Spatial and temporal stability of vision chips including parasitic inductances and capacitances., and . ICASSP, page 1081-1084. IEEE, (1998)Design methodology for determining the number of stages in a cascaded time amplifier to minimize area consumption., , and . IEICE Electron. Express, 10 (11): 20130289 (2013)Asynchronous capacitive SAR ADC based on Hopfield network., , , , , and . IEICE Electron. Express, 19 (18): 20220276 (2022)