( en | de | ru )

 

Disambiguation of "Gupta, Shalabh"

Author of the publication

copydeleteadd this publication to your clipboard
A Non-uniform Sampling Approach for Fast and Efficient Path Planning.

, , and . CoRR, (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Ashutosh Kumar Gupta

Renee Gupta

Jan Chandra Gupta

Ajay Kumar Gupta

Satyapriya Gupta

 

Other publications of authors with the same name

Demonstration of a Single-Lane 80 Gbps PAM-4 Full-Duplex Serial Link., , and . Hot Interconnects, page 32-35. IEEE, (2019)A True Full-Duplex IO (TFD-IO) With Background SI Cancellation for High-Density Interfaces., , and . IEEE Trans. Very Large Scale Integr. Syst., 30 (5): 615-624 (2022)SMARRT: Self-Repairing Motion-Reactive Anytime RRT for Dynamic Environments., , , and . CoRR, (2021)A High-Resolution Digital Phase Interpolator Based CDR with a Half-Rate Hybrid Phase Detector., , , , and . ISCAS, page 1-5. IEEE, (2019)MRRT: Multiple Rapidly-Exploring Random Trees for Fast Online Replanning in Dynamic Environments., , , and . CoRR, (2021)DARE: AI-based Diver Action Recognition System using Multi-Channel CNNs for AUV Supervision., , and . CoRR, (2020)Demonstration of a polarization diversity based SH-QPSK system with CMA-DFE equalizer., , , , and . WOCC, page 1-4. IEEE, (2017)Estimation of Fatigue Life Using Ultrasonic Sensing: A Symbolic Dynamics Approach., and . ACC, page 1149-1154. IEEE, (2007)A Sub-Sampling Phase Detector for Low-Power PAM4 Clock Recovery Circuit., and . MWSCAS, page 929-932. IEEE, (2023)A Low Jitter Double-Tailed Strong-Arm Latch Based Digital-to-Time Converter (DTC)., , and . ICECS, page 1-4. IEEE, (2020)