Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning.

A. Ali, Q. Huang, W. Moses, J. Xiang, I. Stoica, K. Asanovic, and J. Wawrzynek. CoRR, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Qijing Feng

Feiqing Huang

Haishi Huang

Zhida Huang

Ying Huang

Other publications of authors with the same name

Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs.Y. Yang, Q. Huang, B. Wu, T. Zhang, L. Ma, G. Gambardella, M. Blott, L. Lavagno, K. Vissers, J. Wawrzynek and 1 other author(s). CoRR, (2018)Integrating NVIDIA Deep Learning Accelerator (NVDLA) with RISC-V SoC on FireSim.F. Farshchi, Q. Huang, and H. Yun. EMC2@HPCA/CVPR/ISCA, page 21-25. IEEE, (2019)CoDeNet: Algorithm-hardware Co-design for Deformable Convolution.Z. Dong, D. Wang, Q. Huang, Y. Gao, Y. Cai, B. Wu, K. Keutzer, and J. Wawrzynek. CoRR, (2020)HAWQV3: Dyadic Neural Network Quantization.Z. Yao, Z. Dong, Z. Zheng, A. Gholami, J. Yu, E. Tan, L. Wang, Q. Huang, Y. Wang, M. Mahoney and 1 other author(s). CoRR, (2020)The Effect of Compiler Optimizations on High-Level Synthesis-Generated Hardware.Q. Huang, R. Lian, A. Canis, J. Choi, R. Xi, N. Calagar, S. Brown, and J. Anderson. ACM Trans. Reconfigurable Technol. Syst., 8 (3): 14:1-14:26 (2015)ProTuner: Tuning Programs with Monte Carlo Tree Search.A. Haj-Ali, H. Genc, Q. Huang, W. Moses, J. Wawrzynek, K. Asanovic, and I. Stoica. CoRR, (2020)HAO: Hardware-aware Neural Architecture Optimization for Efficient Inference.Z. Dong, Y. Gao, Q. Huang, J. Wawrzynek, H. So, and K. Keutzer. FCCM, page 50-59. IEEE, (2021)AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs.K. Settaluri, A. Haj-Ali, Q. Huang, K. Hakhamaneshi, and B. Nikolic. DATE, page 490-495. IEEE, (2020)Algorithm-hardware Co-design for Deformable Convolution.Q. Huang, D. Wang, Y. Gao, Y. Cai, Z. Dong, B. Wu, K. Keutzer, and J. Wawrzynek. CoRR, (2020)CoDeNet: Efficient Deployment of Input-Adaptive Object Detection on Embedded FPGAs.Q. Huang, D. Wang, Z. Dong, Y. Gao, Y. Cai, T. Li, B. Wu, K. Keutzer, and J. Wawrzynek. FPGA, page 206-216. ACM, (2021)

BibSonomy

Disambiguation of "Huang, Qijing"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning.

Please choose a person to relate this publication to

Qijing Feng

Feiqing Huang

Haishi Huang

Zhida Huang

Ying Huang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Huang, Qijing"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning.

Please choose a person to relate this publication to

Qijing Feng

Feiqing Huang

Haishi Huang

Zhida Huang

Ying Huang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning.