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A sequential strong PUF architecture based on reconfigurable neural networks (RNNs) against state-of-the-art modeling attacks.

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A low output ripple and high security on-chip voltage regulation based on Fourier transform., , , , , , , , , and 1 other author(s). Int. J. Circuit Theory Appl., 51 (6): 2578-2591 (2023)A novel on-chip linear and switching mixed regulation against power analysis attacks., , , , , , , , and . Integr., (November 2023)A sequential strong PUF architecture based on reconfigurable neural networks (RNNs) against state-of-the-art modeling attacks., , , , , , , , , and 1 other author(s). Integr., (2023)Neural Network-Based Entropy: A New Metric for Evaluating Side-Channel Attacks., , , , , , , , , and 3 other author(s). J. Circuits Syst. Comput., 32 (3): 2320001:1-2320001:12 (February 2023)A machine learning low-dropout regulator-assisted differential power analysis attack countermeasure with voltage scaling., , , , , , , , , and 1 other author(s). Int. J. Circuit Theory Appl., 51 (7): 3105-3117 (July 2023)A novel hardware authentication primitive against modeling attacks., , , , , , , , , and . Int. J. Circuit Theory Appl., 51 (6): 2993-3001 (2023)A high-speed and low-latency hardware implementation of RC4 cryptographic algorithm., , , , , , and . Int. J. Circuit Theory Appl., 51 (12): 5980-5996 (December 2023)