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Rethinking Batch Normalization in Transformers., , , , and . CoRR, (2020)Coverage Metrics for Functional Validation of Hardware Designs., and . IEEE Des. Test Comput., 18 (4): 36-45 (2001)Checkmate: Breaking the Memory Wall with Optimal Tensor Rematerialization., , , , , , , and . MLSys, mlsys.org, (2020)Checkmate: Breaking the Memory Wall with Optimal Tensor Rematerialization., , , , , , , and . CoRR, (2019)Code density optimization for embedded DSP processors using data compression techniques., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (7): 601-608 (1998)A unified approach to the synthesis of fully testable sequential machines., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (1): 39-50 (1991)Addendum to "Synthesis of robust delay-fault testable circuits: Theory"., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (4): 445-446 (1996)Multi-source Domain Adaptation in the Deep Learning Era: A Systematic Survey., , , , and . CoRR, (2020)Cross-Domain Sentiment Classification With Contrastive Learning and Mutual Information Maximization., , , , and . CoRR, (2020)HAWQ-V2: Hessian Aware trace-Weighted Quantization of Neural Networks., , , , , , and . CoRR, (2019)