( en | de | ru )

 

Disambiguation of "Lavenier, Dominique"

Author of the publication

copydeleteadd this publication to your clipboard
A Graph-Theoretic Barcode Ordering Model for Linked-Reads.

, , , , , and . WABI, volume 172 of LIPIcs, page 11:1-11:17. Schloss Dagstuhl - Leibniz-Zentrum für Informatik, (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Dominique Dudkowski

Fundamental storage mechanisms for location-based services in mobile ad-hoc networks. Uni Stuttgart, (2009)

Dominique Singer

Dominique Bäumer

Dominique Schaaf

Dominique Bouts

 

Other publications of authors with the same name

Cluster of re-configurable nodes for scanning large genomic banks., , , , , , and . Parallel Comput., 31 (1): 73-96 (2005)A Fully Integrated Systolic Spelling Co-Processor., and . VLSI, volume A-1 of IFIP Transactions, page 257-266. North-Holland, (1991)From Equations to Hardware: Towards Systematic Mapping of Algorithms onto Parallel Architectures., , , , , and . ICPIA, volume 654 of Lecture Notes in Computer Science, page 1-15. Springer, (1992)Prototyping of VLSI components from a formal specification., and . VLSI Signal Processing, 12 (2): 177-186 (1996)Quality Metrics for Benchmarking Sequences Comparison Tools., and . BSB, volume 8826 of Lecture Notes in Computer Science, page 144-153. Springer, (2014)Design and Implementation of a Parallel Architecture for Biological Sequence Comparison., , , and . Euro-Par, Vol. I, volume 1123 of Lecture Notes in Computer Science, page 11-24. Springer, (1996)Placing, Routing, and Editing Virtual FPGAs., , , and . FPL, volume 2147 of Lecture Notes in Computer Science, page 357-366. Springer, (2001)Conception d'architectures systoliques integrées.. (1997)An integrated 2D systolic array for spelling correction.. Integr., 15 (1): 97-111 (1993)An FPGA systolic array using pseudo-random bit generators for computing Goldbach partitions.. Integr., 30 (1): 77-89 (2000)