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Path constraint solving based test generation for observability-enhanced branch coverage.

, , , , , and . VTS, page 1-6. IEEE Computer Society, (2016)

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Property Coverage Analysis Based Trustworthiness Verification for Potential Threats from EDA Tools., , , , , and . ATS, page 43-48. IEEE Computer Society, (2016)Design of Bitstream Co-processor for Multimedia Applications., , , , , and . DASC, page 227-230. IEEE Computer Society, (2013)Flip-flop clustering based trace signal selection for post-silicon debug., , , , , and . VTS, page 1-6. IEEE Computer Society, (2017)Design and implementation of transaction level processor based on UVM., , , , and . ASICON, page 1-4. IEEE, (2013)Path constraint solving based test generation for observability-enhanced branch coverage., , , , , and . VTS, page 1-6. IEEE Computer Society, (2016)A design of configurable image enhancement unit., , , , , and . ASICON, page 1-4. IEEE, (2013)A test approach of combining partial scan with functional testing for high performance processors., , , and . ASICON, page 381-384. IEEE, (2011)Cross-Layer Patch Alignment and Intra-and-Inter Patch Relations for Knowledge Distillation., , , , and . ICIP, page 535-539. IEEE, (2023)Approximate data mapping in refresh-free DRAM for energy-efficient computing in modern mobile systems., , , , , , and . Comput. Commun., (2024)