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Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing.

F. Conti, G. Paulin, A. Garofalo, D. Rossi, A. Mauro, G. Rutishauser, G. Ottavi, M. Eggimann, H. Okuhara, and L. Benini. IEEE J. Solid State Circuits, 59 (1): 128-142 (January 2024)

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Davide Rossi

Davide Cadamuro

Davide Pennino

Davide Batic

Davide Cantoni

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YodaNN: An Architecture for Ultra-Low Power Binary-Weight CNN AccelerationR. Andri, L. Cavigelli, D. Rossi, and L. Benini. (2016)cite arxiv:1606.05487.μDMA: An autonomous I/O subsystem for IoT end-nodes.A. Pullini, D. Rossi, G. Haugou, and L. Benini. PATMOS, page 1-8. IEEE, (2017)Scalable EEG seizure detection on an ultra low power multi-core architecture.S. Benatti, F. Montagna, D. Rossi, and L. Benini. BioCAS, page 86-89. IEEE, (2016)Energy-Efficient Hardware-Accelerated Synchronization for Shared-L1-Memory Multiprocessor Clusters.F. Glaser, G. Tagliavini, D. Rossi, G. Haugou, Q. Huang, and L. Benini. CoRR, (2020)Always-On 674uW @ 4GOP/s Error Resilient Binary Neural Networks with Aggressive SRAM Voltage Scaling on a 22nm IoT End-Node.A. Mauro, F. Conti, P. Schiavone, D. Rossi, and L. Benini. CoRR, (2020)A Fully Programmable eFPGA-Augmented SoC for Smart Power Applications.F. Renzini, C. Mucci, D. Rossi, E. Scarselli, and R. Canegallo. IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (2): 489-501 (2020)A 0.5GHz 0.35mW LDO-Powered Constant-Slope Phase Interpolator With 0.22% INL.A. Elnaqib, H. Okuhara, T. Jang, D. Rossi, and L. Benini. IEEE Trans. Circuits Syst. II Express Briefs, 68 (1): 156-160 (2021)Energy Efficiency of Opportunistic Refreshing for Gain-Cell Embedded DRAM.B. Frankel, E. Sarfati, D. Rossi, and S. Wimer. IEEE Trans. Circuits Syst. I Regul. Pap., 70 (4): 1605-1612 (April 2023)CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration.B. Sá, L. Valente, J. Martins, D. Rossi, L. Benini, and S. Pinto. CoRR, (2023)Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode.G. Ottavi, A. Garofalo, G. Tagliavini, F. Conti, A. Mauro, L. Benini, and D. Rossi. CoRR, (2022)

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Disambiguation of "Rossi, Davide"

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Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing.

Please choose a person to relate this publication to

Davide Rossi

Davide Cadamuro

Davide Pennino

Davide Batic

Davide Cantoni

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Rossi, Davide"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing.

Please choose a person to relate this publication to

Davide Rossi

Davide Cadamuro

Davide Pennino

Davide Batic

Davide Cantoni

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing.