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Unified Signed-Digit Number Adder for RSA and ECC Public-key Cryptosystems.

, , , and . APCCAS, page 1655-1658. IEEE, (2006)

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Indicating Asynchronous Multipliers., , and . EECS, page 547-553. IEEE, (2018)An improved common subexpression elimination method for reducing logic operators in FIR filter implementations without increasing logic depth., , , and . Integr., 43 (1): 124-135 (2010)Towards Run-Time Re-Configurable Techniques for Real-Time Embedded Applications., and . Engineering of Reconfigurable Systems and Algorithms, page 141-146. CSREA Press, (2003)Current-controlled resonant circuit based photovoltaic micro-inverter with half- wave cycloconverter., , and . IAS, page 1-6. IEEE, (2013)An FPGA Model for Developing Dynamic Circuit Computing., and . FPT, page 281-282. IEEE, (2005)Speed and Energy Optimised Quasi-Delay-Insensitive Block Carry Lookahead Adder., , and . CoRR, (2019)Soft-switching single inductor current-fed push-pull converter for PV applications., , , and . IECON, page 5589-5594. IEEE, (2014)Indicating Asynchronous Multipliers., , and . CoRR, (2019)Efficient Overlay Architecture Based on DSP Blocks., , and . FCCM, page 25-28. IEEE Computer Society, (2015)DeCO: A DSP Block Based FPGA Accelerator Overlay with Low Overhead Interconnect., , , , and . FCCM, page 1-8. IEEE Computer Society, (2016)