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Disambiguation of "Feygin, Gennady"

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LMS-based calibration of an RF digitally controlled oscillator for mobile phones.

, , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (3): 225-229 (2006)

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Gennady Uryadov

Sidney Feygin

Gennady Samorodnitsky

Gennady Fedosenko

Gennady Churakov

 

Other publications of authors with the same name

Minimizing Error and VLSI Complexity in the Multiplication-Free Approximation of Arithmetic Coding., , and . Data Compression Conference, page 118-127. IEEE Computer Society, (1993)LMS-based calibration of an RF digitally controlled oscillator for mobile phones., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (3): 225-229 (2006)A 160-MHz analog equalizer for magnetic disk read Channel., , , , , , , and . IEEE J. Solid State Circuits, 32 (11): 1858-1865 (1997)A VLSI Implementation of a Cascade Viterbi Decoder with Traceback., , , , , , , , , and . ISCAS, page 1945-1948. IEEE, (1993)RACER: a reconfigurable constraint-length 14 Viterbi decoder., , and . FCCM, page 60-69. IEEE, (1996)Minimizing Excess Code Length and VLSI Complexity in the Multiplication Free Approximation of Arithmetic Coding., , and . Inf. Process. Manag., 30 (6): 805-816 (1994)A multiprocessor architecture for Viterbi decoders with linear speedup., , and . IEEE Trans. Signal Process., 41 (9): 2907-2917 (1993)A 24mm2 Quad-Band Single-Chip GSM Radio with Transmitter Calibration in 90nm Digital CMOS., , , , , , , , , and 23 other author(s). ISSCC, page 208-209. IEEE, (2008)A 0.8mm2 all-digital SAW-less polar transmitter in 65nm EDGE SoC., , , , , , , , , and 8 other author(s). ISSCC, page 58-59. IEEE, (2010)A 165 MS/s 8-bit CMOS A/D converter with background offset cancellation., , , , , , , and . CICC, page 153-156. IEEE, (2001)