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UWB-GCN: Hardware Acceleration of Graph-Convolution-Network through Runtime Workload Rebalancing.

, , , , , , and . CoRR, (2019)

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Computing Models for FPGA-Based Accelerators., , , , , and . Comput. Sci. Eng., 10 (6): 35-45 (2008)Tangram: Colocating HPC Applications with Oversubscription., , , and . HPEC, page 1-7. IEEE, (2018)Explicit design of FPGA-based coprocessors for short-range force computations in molecular dynamics simulations., , and . Parallel Comput., 34 (4-5): 261-277 (2008)NCBI BLASTP on High-Performance Reconfigurable Computing Systems., and . ACM Trans. Reconfigurable Technol. Syst., 7 (4): 33:1-33:20 (2015)FPGA HPC using OpenCL: Case Study in 3D FFT., and . HEART, page 7:1-7:6. ACM, (2018)Elements of High-Performance Reconfigurable Computing., and . Advances in Computers, (2009)Application-Specific Memory Interleaving for FPGA-Based Grid Computations: A General Design Technique., and . FPL, page 1-7. IEEE, (2006)UWB-GCN: Hardware Acceleration of Graph-Convolution-Network through Runtime Workload Rebalancing., , , , , , and . CoRR, (2019)O3BNN-R: An Out-of-Order Architecture for High-Performance and Regularized BNN Inference., , , , , , , and . IEEE Trans. Parallel Distributed Syst., 32 (1): 199-213 (2021)I-GCN: A Graph Convolutional Network Accelerator with Runtime Locality Enhancement through Islandization., , , , , , , , and . MICRO, page 1051-1063. ACM, (2021)