Author of the publication

Design of efficient error resilience in signal processing and control systems: From algorithms to circuits.

, , and . IOLTS, page 192-195. IEEE, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

On efficient generation of instruction sequences to test for delay defects in a processor., , , and . ACM Great Lakes Symposium on VLSI, page 279-284. ACM, (2008)Quantitative evaluation of soft error injection techniques for robust system design., , , , and . DAC, page 101:1-101:10. ACM, (2013)Non-speculative double-sampling technique to increase energy-efficiency in a high-performance processor., , and . DATE, page 254-257. EDA Consortium San Jose, CA, USA / ACM DL, (2013)FERRARI: A Tool for The Validation of System Dependability Properties., , and . FTCS, page 336-344. IEEE Computer Society, (1992)Hierarchical design and analysis of fault-tolerant multiprocessor systems using concurrent error detection., and . FTCS, page 130-137. IEEE Computer Society, (1990)System accuracy estimation of SRAM-based device authentication., , and . ASP-DAC, page 37-42. IEEE, (2011)Real-time checking of linear control systems using analog checksums., , , and . IOLTS, page 122-127. IEEE, (2013)Memory Distribution: Techniques and Practice for CAD Applications., , and . Parallel Comput., 24 (11): 1597-1615 (1998)Test data compression and test time reduction using an embedded microprocessor., and . IEEE Trans. Very Large Scale Integr. Syst., 11 (5): 853-862 (2003)Delay Defect Diagnosis Methodology Using Path Delay Measurements., , and . IEICE Trans. Electron., 98-C (10): 991-994 (2015)