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Disambiguation of "Gambardella, Giulio"

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Customizing Low-Precision Deep Neural Networks for FPGAs.

, , , , , and . FPL, page 97-100. IEEE Computer Society, (2018)

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Attilio Gambardella

Giulio Mazzolo

Giulio Donati

Giulio Meiattini

Giulio Pellitta

 

Other publications of authors with the same name

Validation & Verification of an EDA automated synthesis tool., , , , and . IDT, page 48-52. IEEE, (2011)MarciaTesta: An Automatic Generator of Test Programs for Microprocessors' Data Caches., , , , and . Asian Test Symposium, page 401-406. IEEE Computer Society, (2011)Accuracy to Throughput Trade-Offs for Reduced Precision Neural Networks on Reconfigurable Logic., , , , , , , and . ARC, volume 10824 of Lecture Notes in Computer Science, page 29-42. Springer, (2018)Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks., , , , and . ICONIP (2), volume 10635 of Lecture Notes in Computer Science, page 393-404. Springer, (2017)Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs., , , , , , , , , and 1 other author(s). CoRR, (2018)FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks., , , , , , , and . ACM Trans. Reconfigurable Technol. Syst., 11 (3): 16:1-16:23 (2018)On the RTL Implementation of FINN Matrix Vector Compute Unit., , , , and . CoRR, (2022)Efficient Error-Tolerant Quantized Neural Network Accelerators., , , , , , and . DFT, page 1-6. IEEE, (2019)A software-based self test of CUDA Fermi GPUs., , , , , , and . ETS, page 1-6. IEEE Computer Society, (2013)SATTA: A Self-Adaptive Temperature-Based TDF Awareness Methodology for Dynamically Reconfigurable FPGAs., , , , and . ACM Trans. Reconfigurable Technol. Syst., 8 (1): 1:1-1:22 (2015)