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Supply and threshold voltage scaling for low power CMOS., , and . IEEE J. Solid State Circuits, 32 (8): 1210-1216 (1997)Low-power SRAM design using half-swing pulse-mode techniques., , , , , , , , and . IEEE J. Solid State Circuits, 33 (11): 1659-1671 (1998)Circuits and techniques for high-resolution measurement of on-chip power supply noise., , and . IEEE J. Solid State Circuits, 40 (4): 820-828 (2005)A 2.4 Gb/s/pin simultaneous bidirectional parallel link with per-pin skew compensation., and . IEEE J. Solid State Circuits, 35 (11): 1619-1628 (2000)Transmit pre-emphasis for high-speed time-division-multiplexed serial-link transceiver., , and . ICC, page 1934-1939. IEEE, (2002)Time-Variant Characterization and Compensation of Wideband Circuits., , , and . CICC, page 487-490. IEEE, (2007)Leveraging designer's intent: A path toward simpler analog CAD tools., , , and . CICC, page 613-620. IEEE, (2009)A 160 ns 54 bit CMOS division implementation using self-timing and symmetrically overlapped SRT stages., and . IEEE Symposium on Computer Arithmetic, page 210-217. IEEE, (1991)Rounding algorithms for IEEE multipliers., , and . IEEE Symposium on Computer Arithmetic, page 176-183. IEEE, (1989)Signal Delay in RC Tree Networks., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2 (3): 202-211 (1983)