( en | de | ru )

 

Disambiguation of "Brisk, Philip"

Author of the publication

copydeleteadd this publication to your clipboard
HALWPE: Hardware-Assisted Light Weight Performance Estimation for GPUs.

, , , and . DAC, page 80:1-80:6. ACM, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Rudolf Briske

Magnus Briskorn

Paul Brisken

Kathrin Brisken

Ana Briski

 

Other publications of authors with the same name

Exploiting fast carry-chains of FPGAs for designing compressor trees., , and . FPL, page 242-249. IEEE, (2009)Path scheduling on digital microfluidic biochips., and . DAC, page 26-35. ACM, (2012)An FPGA Logic Cell and Carry Chain Configurable as a 6: 2 or 7: 2 Compressor., , and . ACM Trans. Reconfigurable Technol. Syst., 2 (3): 19:1-19:42 (2009)Compressor tree synthesis on commercial high-performance FPGAs., , , and . ACM Trans. Reconfigurable Technol. Syst., 4 (4): 39:1-39:19 (2011)Data-Flow Transformations to Maximize the Use of Carry-Save Representation in Arithmetic Circuits., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (10): 1761-1774 (2008)Reducing Microfluidic Very Large-Scale Integration (mVLSI) Chip Area by Seam Carving., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (10): 2104-2116 (2021)Dynamic Radial Placement and Routing in Paper Microfluidics., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (10): 1971-1984 (2021)Automatic Application of Power Analysis Countermeasures., , , , , and . IEEE Trans. Computers, 64 (2): 329-341 (2015)Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage., , , , and . ACM Trans. Archit. Code Optim., 11 (2): 15:1-15:26 (2014)Reducing Microfluidic Very Large Scale Integration (mVLSI) Chip Area by Seam Carving., , and . ACM Great Lakes Symposium on VLSI, page 459-462. ACM, (2017)