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Disambiguation of "Sato, Keno"

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A Physically Unclonable Function Using Time-to-Digital Converter with Linearity Self-Calibration and its FPGA Implementation.

, , , , , , , , , , , , and . ITC-Asia, page 1-6. IEEE, (2023)

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Keno Zimmer

Keno Albrecht

Makoto Sato

Nobuko Sato

Fujio Sato

 

Other publications of authors with the same name

High Precision Voltage Measurement System Utilizing Low-End ATE Resource and BOST., , , , , , , , , and 3 other author(s). ATS, page 37-42. IEEE, (2022)Low Distortion Sinusoidal Signal Generator with Harmonics Cancellation Using Two Types of Digital Predistortion., , , , , , , , , and 4 other author(s). ITC, page 47-55. IEEE, (2023)High Precision Measurement of Sub-Nano Ampere Current in ATE Environment., , , , , , , , , and 3 other author(s). ATS, page 139-140. IEEE, (2021)High-Resolution Low-Sampling-Rate Δ∑ ADC Linearity Short-Time Testing Algorithm., , , , , , , , , and 2 other author(s). ASICON, page 1-4. IEEE, (2019)Accurate and Fast Testing Technique of Operational Amplifier DC Offset Voltage in µV-Order by DC-AC Conversion., , , , , , , , , and 3 other author(s). ITC-Asia, page 1-6. IEEE, (2019)Revisit to Histogram Method for ADC Linearity Test: Examination of Input Signal and Ratio of Input and Sampling Frequencies., , , , , , , , , and 2 other author(s). J. Electron. Test., 38 (1): 21-38 (2022)Innovative Practices Track: Innovative Analog Circuit Testing Technologies., , , , , , , , , and 8 other author(s). VTS, page 1. IEEE, (2022)Summing Node and False Summing Node Methods: Accurate Operational Amplifier AC Characteristics Testing without Audio Analyzer., , , , , , , , , and 5 other author(s). ITC, page 364-373. IEEE, (2021)Summing Node Test Method: Simultaneous Multiple AC Characteristics Testing of Multiple Operational Amplifiers., , , , , , , , , and 5 other author(s). ATS, page 1-6. IEEE, (2020)Evaluation of High-Precision Nano-Ampere Current Measurement Method for Mass Production., , , , , , , , , and 3 other author(s). ICECS, page 1-6. IEEE, (2021)