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Disambiguation of "Meinerzhagen, Pascal Andreas"

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Controlled placement of standard cell memory arrays for high density and low power in 28nm FD-SOI.

, , , , and . ASP-DAC, page 81-86. IEEE, (2015)

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Bernd Meinerzhagen

Bernd Meinerzhagen

Bernd Meinerzhagen

Wilhelm Meinerzhagen

Klaus Meinerzhagen

 

Other publications of authors with the same name

Automated Design For Yield Through Defect Tolerance., , and . VTS, page 1-6. IEEE, (2020)Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop., , , , , , and . ISCAS, page 1-4. IEEE, (2017)Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design., , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (11): 3155-3164 (2014)An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories for Compressed Sensing., , , , , , and . VLSI-SoC (Selected Papers), volume 418 of IFIP Advances in Information and Communication Technology, page 88-106. Springer, (2012)Synthesis strategies for sub-VT systems., , , , and . ECCTD, page 552-555. IEEE, (2011)FireBird: PowerPC e200 based SoC for high temperature operation., , , , , , , and . CICC, page 1-4. IEEE, (2013)Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (1): 358-362 (2016)Two-port low-power gain-cell storage array: Voltage scaling and retention time., , and . ISCAS, page 2469-2472. IEEE, (2012)An All-Digital, $V_MAX$ -Compliant, Stable, and Scalable Distributed Charge Injection Scheme in 10-nm CMOS for Fast and Local Mitigation of Voltage Droop., , , , , , and . IEEE J. Solid State Circuits, 55 (7): 1898-1908 (2020)Energy versus data integrity trade-offs in embedded high-density logic compatible dynamic memories., , , , and . DATE, page 489-494. ACM, (2015)