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Disambiguation of "Pedram, Massoud"

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X-CGRA: An Energy-Efficient Approximate Coarse-Grained Reconfigurable Architecture.

, , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (10): 2558-2571 (2020)

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Pedram Derakhshani

Pedram Emami

Pedram Azad

Pedram Yazdanbakhsh

Pedram Hovareshti

 

Other publications of authors with the same name

Power Simulation and Estimation in VLSI Circuits.. The VLSI Handbook, CRC Press, (1999)Stack sizing analysis and optimization for FinFET logic cells and circuits operating in the sub/near-threshold regime., , and . ISQED, page 341-348. IEEE, (2014)Power-Aware Bus Encoding Techniques for I/O and Data Buses in an Embedded System., and . Journal of Circuits, Systems, and Computers, 11 (4): 351-364 (2002)Timing-driven placement based on partitioning with dynamic cut-net control., and . DAC, page 472-476. ACM, (2000)Constructing Lower and Upper Bounded Delay Routing Trees Using Linear Programming., , and . DAC, page 401-404. ACM Press, (1996)Hierarchical Sequence Compaction for Power Estimation., , and . DAC, page 570-575. ACM Press, (1997)Dynamic Power Management Based on Continuous-Time Markov Decision Processes., and . DAC, page 555-561. ACM Press, (1999)Standard cell library based layout characterization and power analysis for 10nm gate-all-around (GAA) transistors., , , , and . SoCC, page 253-258. IEEE, (2016)Coarse2Fine: A Two-stage Training Method for Fine-grained Visual Classification., , , and . CoRR, (2019)BZ-FAD: A Low-Power Low-Area Multiplier Based on Shift-and-Add Architecture., , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (2): 302-306 (2009)