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Disambiguation of "Benini, Luca"

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ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation.

, , , , , , , and . Int. J. Parallel Program., 52 (1): 93-123 (April 2024)

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Anke Benini

Jochen Benini

Aldo Albert Benini

Luca Tranchini

Luca Rizzini

 

Other publications of authors with the same name

A Class of Code Compression Schemes for Reducing Power Consumption in Embedded Microprocessor Systems., , and . IEEE Trans. Computers, 53 (4): 467-482 (2004)State-of-the-Art SoC Communication Architectures., , , and . Embedded Systems Handbook, CRC Press, (2005)Virtual Simulation of Distributed IP-based Designs., , and . DAC, page 50-55. ACM Press, (1999)Origami: A 803-GOp/s/W Convolutional Network Accelerator., and . IEEE Trans. Circuits Syst. Video Techn., 27 (11): 2461-2475 (2017)A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets., , , and . CoRR, (2018)Efficient Image Dataset Classification Difficulty Estimation for Predicting Deep-Learning Accuracy., , , , , and . CoRR, (2018)A Wearable Device for Brain-Machine Interaction with Augmented Reality Head-Mounted Display., , , , and . BODYNETS, page 339-351. Springer, (2018)Packetization and routing analysis of on-chip multiprocessor networks., , and . J. Syst. Archit., 50 (2-3): 81-104 (2004)Variation-Tolerant Architecture for Ultra Low Power Shared-L1 Processor Clusters., , and . IEEE Trans. Circuits Syst. II Express Briefs, 59-II (12): 927-931 (2012)CMix-NN: Mixed Low-Precision CNN Library for Memory-Constrained Edge Devices., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (5): 871-875 (2020)