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Disambiguation of "Li, Hai Helen"

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Guest Editorial: ACM JETC Special Issue on New Trends in Nanolectronic Device, Circuit, and Architecture Design: Part 2.

, , , and . ACM J. Emerg. Technol. Comput. Syst., 16 (4): 35:1-35:3 (2020)

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Hai Li

Hai Li

Hai-Quing Li

Aili Helenius

Anttiheikki Helenius

 

Other publications of authors with the same name

Build reliable and efficient neuromorphic design with memristor technology., , , and . ASP-DAC, page 224-229. ACM, (2019)Array Organization and Data Management Exploration in Racetrack Memory., , , , and . IEEE Trans. Computers, 65 (4): 1041-1054 (2016)A Compact Memristor-Based Dynamic Synapse for Spiking Neural Networks., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (8): 1353-1366 (2017)Memristor-based synapse design and a case study in reconfigurable systems., , , , and . IJCNN, page 1-6. IEEE, (2013)Neuromorphic acceleration for context aware text image recognition., , , , and . SiPS, page 268-273. IEEE, (2014)3D-ReG: A 3D ReRAM-based Heterogeneous Architecture for Training Deep Neural Networks., , , , , and . ACM J. Emerg. Technol. Comput. Syst., 16 (2): 20:1-20:24 (2020)SiDA: Sparsity-Inspired Data-Aware Serving for Efficient and Scalable Large Mixture-of-Experts Models., , , , , , , , , and . CoRR, (2023)SIO: Synthetic In-Distribution Data Benefits Out-of-Distribution Detection., , , , , and . CoRR, (2023)FlexLevel NAND Flash Storage System Design to Reduce LDPC Latency., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (7): 1167-1180 (2017)Accelerating graph computation with racetrack memory and pointer-assisted graph representation., , , and . DATE, page 1-4. European Design and Automation Association, (2014)