Michael > hardware

publications (hide)13
display
all
publications only
publications per page
5
10
20
50
100
sort by
added at
title
author
publication date
entry type
help for advanced sorting...
RSS
BibTeX
RDF
more...

2Online Quantization Adaptation for Fault-Tolerant Neural Network Inference
M. Beyer, J. Borrmann, A. Guntoro, and H. Blume. page 243--256. Springer International Publishing AG, (2023)
9 months ago by @fabcho
show all tags
Networks
myown
Network
Hardware
Quantization
Tolerance
Fault
Computing
Approximate
Neural
Automotive
NetworksmyownNetworkHardwareQuantizationToleranceFaultComputingApproximateNeuralAutomotive
copydeleteadd this publication to your clipboard
1The Design and Evaluation of a High Performance Smalltalk System
D. Ungar. MIT Press, (February 1986)
a year ago by @gron
show all tags
Processor
Smalltalk
Hardware
SOAR
ProcessorSmalltalkHardwareSOAR
copydeleteadd this publication to your clipboard
1PC Architecture
M. Karbo. Michael Karbos' Guide, (2005)
4 years ago by @jpmor
show all tags
science
hardware
dsc-so
pc
computer
personal
organization
engineering
architecture
sciencehardwaredsc-sopccomputerpersonalorganizationengineeringarchitecture
copydeleteadd this publication to your clipboard
1A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets
F. Schuiki, M. Schaffner, F. Gürkaynak, and L. Benini. (2018)
6 years ago by @loroch
show all tags
hardware
training
deep_learning
architecture
hardwaretrainingdeep_learningarchitecture
copydeleteadd this publication to your clipboard
2Anton 2: Raising the Bar for Performance and Programmability in a Special-purpose Molecular Dynamics Supercomputer
D. Shaw, J. Grossman, J. Bank, B. Batson, J. Butts, J. Chao, M. Deneroff, R. Dror, A. Even, C. Fenton and 35 other author(s). Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, page 41--53. Piscataway, NJ, USA, IEEE Press, (2014)
7 years ago by @salotz
show all tags
hardware
supercomputer
molecular-dynamics
software
asic
md
anton
hardwaresupercomputermolecular-dynamicssoftwareasicmdanton
copydeleteadd this publication to your clipboard
1A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets
F. Schuiki, M. Schaffner, F. Gürkaynak, and L. Benini. (2018)cite arxiv:1803.04783Comment: 16 pages, submitted to IEEE Transactions on Computers journal.
7 years ago by @jk_itwm
show all tags
hardware
to_read
distributed
hardwareto_readdistributed
copydeleteadd this publication to your clipboard
1Anton, a Special-purpose Machine for Molecular Dynamics Simulation
D. Shaw, M. Deneroff, R. Dror, J. Kuskin, R. Larson, J. Salmon, C. Young, B. Batson, K. Bowers, J. Chao and 17 other author(s). Commun. ACM, 51 (7): 91--97 (July 2008)
8 years ago by @salotz
show all tags
hardware
supercomputer
molecular-dynamics
simulation
specialized-hardware
hardwaresupercomputermolecular-dynamicssimulationspecialized-hardware
copydeleteadd this publication to your clipboard
1Transactional Language Constructs for C++
H. Boehm, J. Gottschlich, V. Luchangco, M. Michael, M. Moir, C. Nelson, T. Riegel, T. Shpeisman, and M. Wong. ISO/IEC JTC1/SC22 (Programming languages and operating systems) WG21 (C++), (2012)
11 years ago by @davef
show all tags
hardware
parallel
specification
diss
transaction
concurrency
programming
hardwareparallelspecificationdisstransactionconcurrencyprogramming
copydeleteadd this publication to your clipboard
1Cache Coherence Techniques for Multicore Processors
M. Marty. Madison, WI, USA, (2008)Adviser-Hill, Mark D..
15 years ago by @gron
show all tags
Processor
coherence
Architecture
Hardware
ManyCore
Ring
Cache
Bus
MultiCore
ProcessorcoherenceArchitectureHardwareManyCoreRingCacheBusMultiCore
copydeleteadd this publication to your clipboard
1Hardness By Design Techniques for Field Programmable Gate Arrays
M. Wirthlin, N. Rollins, M. Caffrey, and P. Graham. 11th NASA Symposium on VLSI Design, (2003)
16 years ago by @darkmoonsinger
show all tags
hardware
NASA
590
architecture
hardwareNASA590architecture
copydeleteadd this publication to your clipboard
2Feedback driven instruction-set extension
U. Kastens, D. Le, A. Slowik, and M. Thies. SIGPLAN Not., 39 (7): 126--135 (2004)
16 years ago by @gron
show all tags
hardware
ISA
PhD
Proposal
hardwareISAPhDProposal
copydeleteadd this publication to your clipboard
1ATR's CAM-Brain Machine (CBM) Simulation Results and Representation Issues
N. Nawa, H. de Garis, F. Gers, and M. Korkin. Genetic Programming 1998: Proceedings of the Third Annual Conference, page 875--882. University of Wisconsin, Madison, Wisconsin, USA, Morgan Kaufmann, (22-25 July 1998)
17 years ago by @brazovayeye
show all tags
Hardware
Evolvable
HardwareEvolvable
copydeleteadd this publication to your clipboard
1``CBM (CAM-Brain Machine)'': A Hardware Tool which Evolves a Neural Net Module in a Fraction of a Second and Runs a Million Neuron Artificial Brain in Real Time
M. Korkin, H. de Garis, F. Gers, and H. Hemmi. Genetic Programming 1997: Proceedings of the Second Annual Conference, page 498--503. Stanford University, CA, USA, Morgan Kaufmann, (13-16 July 1997)
17 years ago by @brazovayeye
show all tags
Hardware
Evolvable
HardwareEvolvable
copydeleteadd this publication to your clipboard

⟨⟨
⟨
1
⟩
⟩⟩

BibSonomy

publications (hide)13
display
all
publications only
publications per page
5
10
20
50
100
sort by
added at
title
author
publication date
entry type
help for advanced sorting...
RSS
BibTeX
RDF
more...

2Online Quantization Adaptation for Fault-Tolerant Neural Network Inference

1The Design and Evaluation of a High Performance Smalltalk System

1PC Architecture

1A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets

2Anton 2: Raising the Bar for Performance and Programmability in a Special-purpose Molecular Dynamics Supercomputer

1A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets

1Anton, a Special-purpose Machine for Molecular Dynamics Simulation

1Transactional Language Constructs for C++

1Cache Coherence Techniques for Multicore Processors

1Hardness By Design Techniques for Field Programmable Gate Arrays

2Feedback driven instruction-set extension

1ATR's CAM-Brain Machine (CBM) Simulation Results and Representation Issues

1``CBM (CAM-Brain Machine)'': A Hardware Tool which Evolves a Neural Net Module in a Fraction of a Second and Runs a Million Neuron Artificial Brain in Real Time

related tags

tags

publications (hide)13 displayallpublications onlypublications per page5102050100 sort byadded attitleauthorpublication dateentry typehelp for advanced sorting... RSSBibTeXRDFmore...

related tags

tags

publications (hide)13
display
all
publications only
publications per page
5
10
20
50
100
sort by
added at
title
author
publication date
entry type
help for advanced sorting...
RSS
BibTeX
RDF
more...