%0 Conference Paper %1 conf/aspdac/KomatsuIHK11 %A Komatsu, Yoshiya %A Ishihara, Shota %A Hariyama, Masanori %A Kameyama, Michitaka %B ASP-DAC %D 2011 %I IEEE %K dblp %P 89-90 %T An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2011.html#KomatsuIHK11 %@ 978-1-4244-7516-2

@inproceedings{conf/aspdac/KomatsuIHK11, added-at = {2017-05-26T00:00:00.000+0200}, author = {Komatsu, Yoshiya and Ishihara, Shota and Hariyama, Masanori and Kameyama, Michitaka}, biburl = {https://www.bibsonomy.org/bibtex/2429f5dcb13ec26499f65e46e8ddcde17/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2011}, ee = {http://dl.acm.org/citation.cfm?id=1950836}, interhash = {02df737ba2fdc629fb5a56b363770180}, intrahash = {429f5dcb13ec26499f65e46e8ddcde17}, isbn = {978-1-4244-7516-2}, keywords = {dblp}, pages = {89-90}, publisher = {IEEE}, timestamp = {2019-10-17T16:43:25.000+0200}, title = {An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2011.html#KomatsuIHK11}, year = 2011 }