%0 Conference Paper %1 conf/isvlsi/SaquettiBZPCA21 %A Saquetti, Mateus %A Brum, Raphael Martins %A Zatt, Bruno %A Pagliarini, Samuel %A Cordeiro, Weverton %A Azambuja, José Rodrigo %B ISVLSI %D 2021 %I IEEE %K dblp %P 73-78 %T A Terabit Hybrid FPGA-ASIC Platform for Switch Virtualization. %U http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2021.html#SaquettiBZPCA21 %@ 978-1-6654-3946-6

@inproceedings{conf/isvlsi/SaquettiBZPCA21, added-at = {2023-08-29T00:00:00.000+0200}, author = {Saquetti, Mateus and Brum, Raphael Martins and Zatt, Bruno and Pagliarini, Samuel and Cordeiro, Weverton and Azambuja, José Rodrigo}, biburl = {https://www.bibsonomy.org/bibtex/2b9840f1e4600316001cfe41b56836660/dblp}, booktitle = {ISVLSI}, crossref = {conf/isvlsi/2021}, ee = {https://doi.org/10.1109/ISVLSI51109.2021.00024}, interhash = {07e47e60e2df1366af7f36c52b88a437}, intrahash = {b9840f1e4600316001cfe41b56836660}, isbn = {978-1-6654-3946-6}, keywords = {dblp}, pages = {73-78}, publisher = {IEEE}, timestamp = {2024-04-09T11:37:01.000+0200}, title = {A Terabit Hybrid FPGA-ASIC Platform for Switch Virtualization.}, url = {http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2021.html#SaquettiBZPCA21}, year = 2021 }