%0 Conference Paper %1 conf/islped/HirakiBKGNSSS96 %A Hiraki, Mitsuru %A Bajwa, Raminder Singh %A Kojima, Hirotsugu %A Gorny, Douglas J. %A ichi Nitta, Ken %A Shridhar, Avadhani %A Sasaki, Katsuro %A Seki, Koichi %B ISLPED %D 1996 %E Horowitz, Mark %E Rabaey, Jan M. %E Barton, Brock %E Pedram, Massoud %I IEEE %K dblp %P 353-358 %T Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer. %U http://dblp.uni-trier.de/db/conf/islped/islped1996.html#HirakiBKGNSSS96 %@ 0-7803-3571-6

@inproceedings{conf/islped/HirakiBKGNSSS96, added-at = {2018-11-30T00:00:00.000+0100}, author = {Hiraki, Mitsuru and Bajwa, Raminder Singh and Kojima, Hirotsugu and Gorny, Douglas J. and ichi Nitta, Ken and Shridhar, Avadhani and Sasaki, Katsuro and Seki, Koichi}, biburl = {https://www.bibsonomy.org/bibtex/2564a9702be60cf05afc60334d35c9cc4/dblp}, booktitle = {ISLPED}, crossref = {conf/islped/1996}, editor = {Horowitz, Mark and Rabaey, Jan M. and Barton, Brock and Pedram, Massoud}, ee = {https://dl.acm.org/citation.cfm?id=252634}, interhash = {10c9e7ff5d145ca9af8bf34ac0da1154}, intrahash = {564a9702be60cf05afc60334d35c9cc4}, isbn = {0-7803-3571-6}, keywords = {dblp}, pages = {353-358}, publisher = {IEEE}, timestamp = {2024-04-09T20:43:41.000+0200}, title = {Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer.}, url = {http://dblp.uni-trier.de/db/conf/islped/islped1996.html#HirakiBKGNSSS96}, year = 1996 }