%0 Conference Paper %1 conf/hpsr/ReviriegoPUZ018 %A Reviriego, Pedro %A Pontarelli, Salvatore %A Ullah, Anees %A Zahir, Ali %A Bianchi, Giuseppe %B HPSR %D 2018 %I IEEE %K dblp %P 1-6 %T Multiple Hash Matching Units (MHMU): An Algorithmic Ternary Content Addressable Memory Design for Field Programmable Gate Arrays. %U http://dblp.uni-trier.de/db/conf/hpsr/hpsr2018.html#ReviriegoPUZ018 %@ 978-1-5386-7801-5

@inproceedings{conf/hpsr/ReviriegoPUZ018, added-at = {2019-10-01T00:00:00.000+0200}, author = {Reviriego, Pedro and Pontarelli, Salvatore and Ullah, Anees and Zahir, Ali and Bianchi, Giuseppe}, biburl = {https://www.bibsonomy.org/bibtex/25cd8c23868fc66bc0de0e00583e35783/dblp}, booktitle = {HPSR}, crossref = {conf/hpsr/2018}, ee = {https://doi.org/10.1109/HPSR.2018.8850764}, interhash = {293c3558523b27d1db591bf91ca18fd1}, intrahash = {5cd8c23868fc66bc0de0e00583e35783}, isbn = {978-1-5386-7801-5}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE}, timestamp = {2019-10-17T15:38:00.000+0200}, title = {Multiple Hash Matching Units (MHMU): An Algorithmic Ternary Content Addressable Memory Design for Field Programmable Gate Arrays.}, url = {http://dblp.uni-trier.de/db/conf/hpsr/hpsr2018.html#ReviriegoPUZ018}, year = 2018 }