%0 Conference Paper %1 conf/isscc/YuYXQOYYJZ12 %A Yu, Zhiyi %A You, Kaidi %A Xiao, Ruijin %A Quan, Heng %A Ou, Peng %A Ying, Yan %A Yang, Haofan %A e Jing, Ming %A Zeng, Xiaoyang %B ISSCC %D 2012 %I IEEE %K dblp %P 64-66 %T An 800MHz 320mW 16-core processor with message-passing and shared-memory inter-core communication mechanisms. %U http://dblp.uni-trier.de/db/conf/isscc/isscc2012.html#YuYXQOYYJZ12 %@ 978-1-4673-0376-7

@inproceedings{conf/isscc/YuYXQOYYJZ12, added-at = {2021-05-17T00:00:00.000+0200}, author = {Yu, Zhiyi and You, Kaidi and Xiao, Ruijin and Quan, Heng and Ou, Peng and Ying, Yan and Yang, Haofan and e Jing, Ming and Zeng, Xiaoyang}, biburl = {https://www.bibsonomy.org/bibtex/2ee1d4a2cb5b07622a69287545a5cbf69/dblp}, booktitle = {ISSCC}, crossref = {conf/isscc/2012}, ee = {https://doi.org/10.1109/ISSCC.2012.6176931}, interhash = {2f974a33fe8dceb1ea2c464524c9ac41}, intrahash = {ee1d4a2cb5b07622a69287545a5cbf69}, isbn = {978-1-4673-0376-7}, keywords = {dblp}, pages = {64-66}, publisher = {IEEE}, timestamp = {2024-04-10T11:03:25.000+0200}, title = {An 800MHz 320mW 16-core processor with message-passing and shared-memory inter-core communication mechanisms.}, url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2012.html#YuYXQOYYJZ12}, year = 2012 }