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%0 Conference Paper
%1 conf/glvlsi/NiuZYCYS11
%A Niu, Feifei
%A Zhou, Qiang
%A Yao, Hailong
%A Cai, Yici
%A Yang, Jianlei
%A Sze, Chin Ngai
%B ACM Great Lakes Symposium on VLSI
%D 2011
%E Atienza, David
%E Xie, Yuan
%E Ayala, José L.
%E Stevens, Ken S.
%I ACM
%K dblp
%P 199-204
%T Obstacle-avoiding and slew-constrained buffered clock tree synthesis for skew optimization.
%U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2011.html#NiuZYCYS11
%@ 978-1-4503-0667-6
@inproceedings{conf/glvlsi/NiuZYCYS11,
added-at = {2020-04-05T00:00:00.000+0200},
author = {Niu, Feifei and Zhou, Qiang and Yao, Hailong and Cai, Yici and Yang, Jianlei and Sze, Chin Ngai},
biburl = {https://www.bibsonomy.org/bibtex/2fcbd820f92cbe975d1d69b0d8f76f559/dblp},
booktitle = {ACM Great Lakes Symposium on VLSI},
crossref = {conf/glvlsi/2011},
editor = {Atienza, David and Xie, Yuan and Ayala, José L. and Stevens, Ken S.},
ee = {https://doi.org/10.1145/1973009.1973049},
interhash = {3200b4ab08262f19a2b27d40fb2167c3},
intrahash = {fcbd820f92cbe975d1d69b0d8f76f559},
isbn = {978-1-4503-0667-6},
keywords = {dblp},
pages = {199-204},
publisher = {ACM},
timestamp = {2020-04-07T11:42:12.000+0200},
title = {Obstacle-avoiding and slew-constrained buffered clock tree synthesis for skew optimization.},
url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2011.html#NiuZYCYS11},
year = 2011
}