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Disambiguation of "Sze, Chin Ngai"

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Obstacle-avoiding and slew-constrained buffered clock tree synthesis for skew optimization.

, , , , , and . ACM Great Lakes Symposium on VLSI, page 199-204. ACM, (2011)

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Vivienne Sze

Elion Chin

Erika Chin

Siu Ning Sze

Chin Buranadham

 

Other publications of authors with the same name

On improved graph-based alternative wiring scheme for multi-level logic optimization., , , and . ICECS, page 654-657. IEEE, (2000)RUMBLE: an incremental, timing-driven, physical-synthesis optimization algorithm., , , , , , , and . ISPD, page 2-9. ACM, (2008)Wire synthesizable global routing for timing closure., and . ASP-DAC, page 545-550. IEEE, (2011)Algorithms for the scaling toward nanometer VLSI physical synthesis.. Texas A&M University, College Station, USA, (2007)base-search.net (fttexasamuniv:oai:oaktrust.library.tamu.edu:1969.1/4922).Performance-driven multi-level clustering for combinational circuits., and . ASP-DAC, page 729-740. ACM, (2003)Obstacle-avoiding and slew-constrained buffered clock tree synthesis for skew optimization., , , , , and . ACM Great Lakes Symposium on VLSI, page 199-204. ACM, (2011)Pyramids: an efficient computational geometry-based approach for timing-driven placement., , , , , and . ICCAD, page 204-211. IEEE Computer Society, (2008)A methodology for propagating design tolerances to shape tolerances for use in manufacturing., , , , and . DATE, page 1273-1278. IEEE Computer Society, (2010)Improved alternative wiring scheme applying dominator relationship., and . ASP-DAC, page 473-478. ACM, (2001)Placement: Hot or Not?, , , , , and . ICCAD, page 283-290. ACM, (2012)