%0 Conference Paper %1 conf/isca/SuhOSD05 %A Suh, G. Edward %A O'Donnell, Charles W. %A Sachdev, Ishan %A Devadas, Srinivas %B ISCA %D 2005 %I IEEE Computer Society %K dblp %P 25-36 %T Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions. %U http://dblp.uni-trier.de/db/conf/isca/isca2005.html#SuhOSD05 %@ 978-0-7695-2270-8

@inproceedings{conf/isca/SuhOSD05, added-at = {2023-03-24T00:00:00.000+0100}, author = {Suh, G. Edward and O'Donnell, Charles W. and Sachdev, Ishan and Devadas, Srinivas}, biburl = {https://www.bibsonomy.org/bibtex/23f690ac4e3438a72dded45067c548066/dblp}, booktitle = {ISCA}, crossref = {conf/isca/2005}, ee = {http://dl.acm.org/citation.cfm?id=1069974}, interhash = {407e14dfc356db216143f897ef548058}, intrahash = {3f690ac4e3438a72dded45067c548066}, isbn = {978-0-7695-2270-8}, keywords = {dblp}, pages = {25-36}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T01:40:52.000+0200}, title = {Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions.}, url = {http://dblp.uni-trier.de/db/conf/isca/isca2005.html#SuhOSD05}, year = 2005 }