%0 Conference Paper %1 conf/icecsys/BreaVC98 %A Brea, Víctor M. %A Vilariño, David López %A Cabello, Diego %B ICECS %D 1998 %I IEEE %K dblp %P 285-288 %T An analog CMOS realisation of a reconfigurable discrete-time cellular neural network. %U http://dblp.uni-trier.de/db/conf/icecsys/icecsys1998.html#BreaVC98 %@ 0-7803-5008-1

@inproceedings{conf/icecsys/BreaVC98, added-at = {2021-06-29T00:00:00.000+0200}, author = {Brea, Víctor M. and Vilariño, David López and Cabello, Diego}, biburl = {https://www.bibsonomy.org/bibtex/25e2ec179a1f334b44e27c1d414c0e103/dblp}, booktitle = {ICECS}, crossref = {conf/icecsys/1998}, ee = {https://doi.org/10.1109/ICECS.1998.813988}, interhash = {4888ac3241a828be15ab15e80ad0df0e}, intrahash = {5e2ec179a1f334b44e27c1d414c0e103}, isbn = {0-7803-5008-1}, keywords = {dblp}, pages = {285-288}, publisher = {IEEE}, timestamp = {2024-04-09T16:19:54.000+0200}, title = {An analog CMOS realisation of a reconfigurable discrete-time cellular neural network.}, url = {http://dblp.uni-trier.de/db/conf/icecsys/icecsys1998.html#BreaVC98}, year = 1998 }