%0 Conference Paper %1 conf/fpga/DuHZZ22 %A Du, Yixiao %A Hu, Yuwei %A Zhou, Zhongchun %A Zhang, Zhiru %B FPGA %D 2022 %E Adler, Michael %E Ienne, Paolo %I ACM %K dblp %P 54-64 %T High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS: A Case Study on SpMV. %U http://dblp.uni-trier.de/db/conf/fpga/fpga2022.html#DuHZZ22 %@ 978-1-4503-9149-8

@inproceedings{conf/fpga/DuHZZ22, added-at = {2023-09-30T00:00:00.000+0200}, author = {Du, Yixiao and Hu, Yuwei and Zhou, Zhongchun and Zhang, Zhiru}, biburl = {https://www.bibsonomy.org/bibtex/2697fd2c8ec33d3e89df7075c9fba8131/dblp}, booktitle = {FPGA}, crossref = {conf/fpga/2022}, editor = {Adler, Michael and Ienne, Paolo}, ee = {https://doi.org/10.1145/3490422.3502368}, interhash = {4c22688f7a23d1097b8ac1d2fd27f4fd}, intrahash = {697fd2c8ec33d3e89df7075c9fba8131}, isbn = {978-1-4503-9149-8}, keywords = {dblp}, pages = {54-64}, publisher = {ACM}, timestamp = {2024-04-09T12:10:07.000+0200}, title = {High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS: A Case Study on SpMV.}, url = {http://dblp.uni-trier.de/db/conf/fpga/fpga2022.html#DuHZZ22}, year = 2022 }