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Disambiguation of "Zhang, Zhiru"

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High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS: A Case Study on SpMV.

, , , and . FPGA, page 54-64. ACM, (2022)

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Zhiru Shi

Zhang Zhang

Meng Zhang

Methods and implementations of road-network matching. TU München, (2009)

Shuying Zhang

Chengdian Zhang

 

Other publications of authors with the same name

Architecture and synthesis for multi-cycle on-chip communication., , , , and . CODES+ISSS, page 77-78. ACM, (2003)Architecture and Synthesis for Area-Efficient Pipelining of Irregular Loop Nests., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (11): 1817-1830 (2017)Enabling adaptive loop pipelining in high-level synthesis., , , and . ACSSC, page 131-135. IEEE, (2017)Special Session: Machine Learning for Embedded System Design., , , , , , , , , and 1 other author(s). CODES+ISSS, page 28-37. IEEE, (2023)Layout Symmetry Annotation for Analog Circuits with Graph Neural Networks., , , , , and . ASP-DAC, page 152-157. ACM, (2021)PokeBNN: A Binary Pursuit of Lightweight Accuracy., , and . CVPR, page 12465-12475. IEEE, (2022)Understanding Hyperdimensional Computing for Parallel Single-Pass Learning., , , and . NeurIPS, (2022)High-level synthesis with timing-sensitive information flow enforcement., , , and . ICCAD, page 88. ACM, (2018)Exact Memory- and Communication-aware Scheduling of DNNs on Pipelined Edge TPUs., , and . SEC, page 203-215. IEEE, (2022)GraphZoom: A Multi-level Spectral Approach for Accurate and Scalable Graph Embedding., , , , and . ICLR, OpenReview.net, (2020)