%0 Journal Article %1 journals/jssc/JiangZCXLLMC23 %A Jiang, Wenning %A Zhu, Yan %A Chen, Chixiao %A Xu, Hao %A Liu, Qi %A Liu, Ming %A Martins, Rui Paulo %A Chan, Chi-Hang %D 2023 %J IEEE J. Solid State Circuits %K dblp %N 10 %P 2709-2721 %T A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier. %U http://dblp.uni-trier.de/db/journals/jssc/jssc58.html#JiangZCXLLMC23 %V 58

@article{journals/jssc/JiangZCXLLMC23, added-at = {2024-07-21T00:00:00.000+0200}, author = {Jiang, Wenning and Zhu, Yan and Chen, Chixiao and Xu, Hao and Liu, Qi and Liu, Ming and Martins, Rui Paulo and Chan, Chi-Hang}, biburl = {https://www.bibsonomy.org/bibtex/2528554a8efa2341593ae17b85796ee51/dblp}, ee = {https://doi.org/10.1109/JSSC.2023.3290119}, interhash = {58ce3fd2476d44ddf560ba1433822c13}, intrahash = {528554a8efa2341593ae17b85796ee51}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, month = {October}, number = 10, pages = {2709-2721}, timestamp = {2024-07-22T07:02:34.000+0200}, title = {A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc58.html#JiangZCXLLMC23}, volume = 58, year = 2023 }