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Disambiguation of "Martins, Rui Paulo"

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A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier.

, , , , , , , and . IEEE J. Solid State Circuits, 58 (10): 2709-2721 (October 2023)

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Paulo Martins Engel

Paulo Ney Aguiar Martins

Milan Paulovic

Manuel António Paulo

Hartwig Paulo

 

Other publications of authors with the same name

A 0.3-V, 37.5-nW 1.5∼6.5-pF-input-range supply voltage tolerant capacitive sensor readout., , , and . ISIC, page 388-391. IEEE, (2014)A 0.016mm2 144μW three-stage amplifier capable of driving 1-to-15nF capacitive load with >0.95MHz GBW., , , and . ISSCC, page 368-370. IEEE, (2012)16.4 A 5mW 7b 2.4GS/s 1-then-2b/cycle SAR ADC with background offset calibration., , , , , and . ISSCC, page 282-283. IEEE, (2017)A μNMR CMOS transceiver using a butterfly-coil input for integration with a digital microfluidic device inside a portable magnet., , , and . A-SSCC, page 1-4. IEEE, (2015)A 1-V 2.5-mW Transient-Improved Current-Steering DAC using Charge-Removal-Replacement Technique., , and . APCCAS, page 183-186. IEEE, (2006)SC biquad filter with hybrid utilization of OpAmp and comparator-based circuit., , , and . ISCAS, page 1276-1279. IEEE, (2010)A 1.83 μW, 0.78 μVrms input referred noise neural recording front end., , , and . ISCAS, page 405-408. IEEE, (2013)A generalized timing-skew-free, multi-phase clock generation platform for parallel sampled-data systems., , and . ISCAS (1), page 369-372. IEEE, (2004)Highly accurate mismatch-free SC delay circuits with reduced finite gain and offset sensitivity., , and . ISCAS (2), page 57-60. IEEE, (1999)Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output., , , and . ISCAS (1), page 129-132. IEEE, (2003)